1. Field of the Invention
Embodiments of the invention relate to a display device, and more particularly to a liquid crystal display (LCD) device.
2. Discussion of the Related Art
Recently, active matrix LCD devices are widely used in flat TVs, portable computers, monitors, and so on due to their performance capabilities, such as high speed, high contrast and high resolution. Among the active matrix LCD devices, a twisted nematic (TN) mode LCD device is typically used. The TN mode LCD device drives a liquid crystal director twisted at an angle 90° by applying a voltage to two electrodes respectively arranged on two substrates. The TN mode LCD device provides excellent contrast and color reproduction but has a narrow viewing angle.
To solve the problem of narrow viewing angle in the TN mode LCD device, an in-plane switching (IPS) mode LCD device has been developed in which two electrodes are formed on one substrate and a liquid crystal director is controlled by a horizontal electric field generated between the two electrodes. However, the (IPS) mode LCD device has a low aperture ratio and poor transmittance. To improve aperture ratio and transmittance of the IPS mode, a fringe field switching (FFS) mode LCD device has been developed in which a relative electrode and a pixel electrode are positioned such that a liquid crystal director is controlled by a fringe electric field formed between the relative electrode and the pixel electrode.
FIG. 1 is a plan view illustrating a related art IPS mode LCD device, FIG. 2 is a cross-sectional view taken along line I-I′ of FIG. 1, FIG. 3 is a plan view illustrating an LCD device driven in a checkerboard pattern, FIG. 4 is a plan view illustrating an LCD device driven in a vertical pattern, FIGS. 5A and 5B illustrate driving of a checkerboard pattern according to the related art, and FIGS. 6A and 6B are timing diagrams illustrating driving of a checkerboard pattern according to the related art.
The related art IPS mode LCD device includes a thin film transistor (TFT) array substrate, a color filter array substrate, and a liquid crystal layer. The TFT array substrate and the color filter array substrate are bonded to each other with a layer of liquid crystal molecules interposed between the two array substrates. As show in FIGS. 1 and 2, the TFT array substrate 11 includes gate lines 12, data lines 15, and thin film transistors. The gate lines 12 vertically cross the data lines 25 to define sub-pixels. Each of the thin film transistors is arranged adjacent to where gate lines 12 and data lines 15 cross. A passivation layer 16 is formed over the TFT array, including the thin film transistors.
Each sub-pixel includes common lines 25, a plurality of common electrodes 24, and a plurality of pixel electrodes 17. The common lines are arranged in parallel with the gate lines 12. The common electrodes 24 extend from the common lines 25 and are arranged in parallel with the data lines 15. The pixel electrodes 17 and the common electrodes 24 are alternately arranged in parallel. The pixel electrodes 17 are connected to the thin film transistors. When a signal Vcom is transmitted to the common electrode 24 and a signal Vdata passing through the thin film transistor is transmitted to the pixel electrode 17, a horizontal electric field E is generated. However, parasitic capacitance Cdc may occur between the data line 15 and the common electrode 24 located in the outmost corner of the sub-pixel.
The color filter array substrate includes red (R), green (G) and blue (B) color filter layers arranged at constant intervals to display colors. A black matrix layer divides R, G and B cells from one another and shields light. The respective R, G, and B color filter layers are formed to collectively correspond to the pixels so that each pixel has at least R, G, and B color sub-pixels. Typically, the sub-pixels having R, G, and B colors are driven independently. A color of one pixel is displayed by combination of the R, G, and B sub-pixels.
The R, G, and B color filter layers are positioned depending on their arrangement method, such as a stripe arrangement, a mosaic arrangement, a delta arrangement, and a quad arrangement. The stripe arrangement, as shown in FIGS. 3 and 4, is when the R, G, and B color filter layers are sequentially arranged in a horizontal direction so as to have the same colors arranged in a vertical direction. The R, G, and B sub-pixels of the aforementioned related art LCD device are all turned on/off to display black (B) or white (W) so as to check picture quality characteristics, such as residual images, flicker, and green tint.
As shown in FIG. 3, the LCD device may be driven in a checkerboard pattern in which an Nth turned-on pixel and an N+1th turned-on pixel are separated by at least one pixel within a line and are offset with respect to turned-on pixels of another line. As shown in FIG. 4, the LCD device may be driven in a vertical pattern in which an Nth turned-on pixel and an N+1th turned-on pixel are arranged at the same position for each line in a vertical direction and are separated by at least one pixel within a line.
In a case where the LCD device is driven in the checkerboard pattern, as shown in FIGS. 5A and 5B, voltages of positive polarity (+) and negative polarity (−) are applied in a horizontal direction by a dot inversion mode and the voltages are applied in a vertical direction by the dot inversion mode through the data line 15. At this time, the LCD device is driven so that white (W) and black (B) of the Nth line are opposite to white (W) and black (B) of the N+1th line in a vertical direction.
Voltages are applied through the data line 15 and the common electrode 24 to turn-on and turn-off sub-pixels. For example, a data voltage Vdata is applied to the Nth line in such a manner that voltages of positive polarity (+) and negative polarity (−) are applied by an alternating current (AC) and levels of the data voltage are varied to display black and white while a common voltage Vcom1 is applied to the Nth line by a direct current (DC). The layer of liquid crystal molecules is driven by the potential difference between the data voltage Vdata on the pixel electrode 17 and the common voltage Vcom1 on the common electrode 24.
As shown in FIGS. 5A and 6A, voltages of high level sequentially having positive polarity (+), negative polarity (−), and positive polarity (+) are applied to the Nth line by a dot inversion mode with respect to R, G, and B sub-pixels so as to display white. On the other hand, either voltage of low level or no voltage is applied to the Nth line by a dot inversion mode with respect to R, G, and B sub-pixels so as to display black.
As shown in FIGS. 5B and 6B, voltages of high level sequentially having positive polarity (+), negative polarity (−), and positive polarity (+) are applied to the N+1th line by a dot inversion mode with respect to R, G, and B sub-pixels so as to display white. On the other hand, either voltages of low level or no voltages are applied to the N+1th line by a dot inversion mode with respect to R, G, and B sub-pixels so as to display black.
The polarity of the data voltage applied to the Nth line is opposite to the polarity of the data voltage applied to the N+1th line in the dot inversion mode. If the data voltage is applied by a two-dot inversion mode, polarity of the data voltage is opposite to the polarity of the data voltage every two lines. For example, the data voltage Vdata of positive polarity (+), negative polarity (−), and positive polarity (+) is applied to the R, G, and B sub-pixels of the Nth and N+1th lines while the data voltage Vdata of negative polarity (−), positive polarity (+), and negative polarity (−) is applied to the R, G, and B sub-pixels of the N+2th and N+3th lines.
The related art LCD device has several problems. When the data voltage Vdata is applied to the Nth line by an AC voltage and the common voltage Vcom1 is also applied thereto by a DC voltage, fluctuation of the common voltage is amplified between the data line 15 and its adjacent common electrode 24 due to interference from the parasitic capacitance Cdc of a coupling between the data voltage Vdata and the common voltage Vcom1. Thus, as shown in FIGS. 6A and 6B, coupling occurs in which the common voltage Vcom1 becomes the common voltage Vcom2, which can be either higher or lower than the actual applied common voltage Vcom1.
As shown in FIG. 5A, in the R sub-pixel of the Nth line, a coupling can be generated between the common electrode and the left data line. More specifically, the common electrode is connected with the common line 25 that carries the common voltage Vcom1 and the left data line 15 carries the data voltage Vdata of positive polarity (+) that creates a coupling that offsets a coupling generated between the common electrode and the right data line, which carries the data voltage having a negative polarity (−). In the G sub-pixel of the Nth line, a coupling generated between the common electrode and the left data line, which carries a data voltage having a negative polarity (−), is offset by a coupling generated between the common electrode and the right data line, which carries a data voltage of positive polarity (+). However, in the B sub-pixel of the Nth line, a coupling is generated between the common electrode and the left data line, where carries a data voltage of positive polarity (+), but an offset coupling is not generated between the common electrode and the right data line, which carries a reference voltage flows (0). As a result, in the B sub-pixel of the Nth line, a sufficient offset coupling is not obtained due to the data voltage of positive polarity (+) through the left data line that is not offset.
Fluctuations of the common voltage are amplified in the Nth line due to the non-offset coupling of the Nth line in the B sub-pixel. Thus, as shown in FIG. 6A, the common voltage Vcom1 is amplified to a more positive polarity (+) and the Vcom1 become a common voltage Vcom2. When the Vcom2 flowing in the common line becomes higher than the applied common DC voltage Vcom1 due to the non-offset coupling, the voltage difference V2 between the voltages Vdata and Vcom2 applied to the G sub-pixel becomes greater than the voltage difference V1 between the voltages Vdata and Vcom2 applied to the R and B sub-pixels. In this case, a greenish phenomenon occurs in which green is brighter than it should be. This is because rotation of the liquid crystal molecules increases to more strongly display a color as the voltage difference increases.
By contrast, in case of the N+1th line, as shown in FIG. 5B, coupling generated in the R and G sub-pixels is offset but a coupling generated in the B sub-pixel remain due to the data voltage of negative polarity (−) through the left data line. As a result, fluctuation of the common voltage is amplified in the N+1th line due to the non-offset coupling generated in the B sub-pixel. Thus, as shown in FIG. 6B, the Vcom1 is amplified toward a more negative polarity (−) and the Vcom1 become a common voltage Vcom2. When the Vcom2 flowing in the common line becomes lower than the applied common DC voltage Vcom1 due to the non-offset coupling, the voltage difference V4 between the voltages Vdata and Vcom2 applied to the G sub-pixel becomes greater than the voltage difference V4 between the voltages Vdata and Vcom2 applied to the R and B sub-pixels. In this case, a greenish phenomenon occurs in which green is brighter than is should be.